Category: fpga
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Xilinx Zynq: Initial Impressions
I’ve been passively watching the FPGA space for the past few years. Partially because I think they’re a really interesting technology, but also because, as The Next Platform says: [T]here are clear signs that the FPGA is set to become a compelling acceleration story over the next few years. From the relatively recent Intel acquisition…
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Fray Trace: an FPGA raytracer
There’s a cool-looking competition being held right now, called The Hackaday Prize. I originally tried to do this super-ambitious custom-SBC project — there’s no writeup yet but you can see some photos of the pcbs here — but it’s looking like that’s difficult enough that it’s not going to happen in time. So instead I’ve decided…
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First FPGA board: it’s all about JTAG
Well, I finally sort-of accomplished one of my original goals: designing and building a custom FPGA board. The reason it took a while, and somewhat separately also the reason I can’t use it very much, are both due to JTAG issues. Here’s a picture in all its low-res glory: Without getting too much into the…
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Choosing FPGA parts
I spent some time this weekend looking into different FPGA options for potential future projects; I’ve been using the Spartan-6 on my Nexys3 board, and I created a simple breakout board http://oshpark.com/shared_projects/duLs3P1R for it, but I started to learn more about the limitations of staying within that single product class. The Spartan-6 is limited on the high-end,…
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Nexys 4
I’ve blogged in the past about my Nexys 3, though I haven’t used it very much lately (other than leaving it in bitcoin-mining-mode, where it’s earned me about ten cents in the past week). I was browsing the Digilent website for some an ARM-based Raspberry-Pi equivalent (I already forget why), and I checked out their new…
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Link: Spartan-6 FPGA PCB Design and Pin Planning Guide
I ran into this very-informative Xilinx user guide about PCB layout; it’s specifically tailored towards people who are interested in mounting a Spartan-6 FPGA on a board, especially for high-speed use, but I found it to be a good introduction to PCB design for high-speed circuits (such as explaining parasitic inductances, how to determine them…
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Aside: ASIC conversion
The current state of the Bitcoin mining world seems to revolve around new ASIC-based miners that are coming out, such as from Butterfly Labs. These devices seem to be very profitable investments if you can get your hands on one — this calculator says that the $2,499 50GH/s machine should pay itself off itself off in…
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FPGA Bitcoin Miner: Improvements
In my last post, I talked about how I did a basic conversion of my bitcoin mining script into verilog for an fpga. The next thing to do, of course, was to increase the mining speed. But first, a little more detail about how the miner works: Overview of a Bitcoin miner The whole Bitcoin…
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FPGA Bitcoin Miner: First Implementation
So, now that I have a working UART module and a simple bitcoin miner, it’s time to implement SHA256 functionality. Specifically, I’m going to implement the 512-bit per-chunk part of the algorithm, since that seems like a good level of abstraction. There’s some other stuff the algorithm does, such as setting initial values and padding, but in…
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Building a Processor, Part 8: UART Communication
This is part 8 of my Building a Processor series, where I try to build a processor on an FPGA board. This post is about getting the UART peripheral to work so that I can communicate directly between the board and my computer. Previous: further optimizing the debouncer. In my previous post, I brought up the…
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